嵌入式linux dlna,玩转硬件 – AVC-LAN - 嵌入式 Linux 知识库
ContentsIntroductionThe AVC-LAN is part of the Body Electrical System Control and managesall audio and video related functions. The audio bus is described inToyota’s own words as follows:AVC-LAN consi
Contents
Introduction
The AVC-LAN is part of the Body Electrical System Control and manages
all audio and video related functions. The audio bus is described in
Toyota’s own words as follows:
AVC-LAN consist of audio visual systems such as the multi-display, navigation ECU, radio and
player, stereo component amplifier and gateway ECU. Gateway ECU has communication
circuit to correspond with different types of communication data. Different types of
communication data can be shared among communication parts after it goes through gateway
ECU (System Circuits: AVC-LAN Bus, “Prius Wiring Diagram” 80).
The system itself can be considered a subset of the IEBus Standard,
which was delevoped by NEC electronics for automotive use. It is
slightly faster than the BEAN Bus and has more
data per command, but is still much slower than CAN
Bus, since realtime speeds are not required.
Connections

Waveform

Prep 7uS
Sync 20uS
Data 13uS
Protocol


This is an AVC-LAN message captured using a logic probe.
Hardware
Specific
Renesas HA12240
Differential Transceiver
A2240 Package Marking
CA0008 Package Marking
CA0013 Package Marking
NEC uPD6708 IEBus (Inter
Equipment Bus) Protocol Controller
NEC uPD72042 IEBus
(Inter Equipment Bus) Protocol Controller
General Purpose
LM239 comparator (can be used for receiver)
PCA82C250 CAN Bus (can be used for driver)
MCP2551 CAN Bus (can be used for driver)
RS-485 Differential Transceiver ( can be used for both receiver and
driver)
SN65HVD11 +3.3V
SN75HVD11 +5v
Hacks
Marcin Slonicki’s Toyota Corolla AVC-Lan MP3
player using:
ATmega8 is clocked at 14.7456 MHz with an external crystal
PCA82C250 CAN bus driver is used to drive the IEBus
LM239 comparator is required on top of the PCA82C250 to read
from the IEBus
Louis Frigon’s Toyota Auxiliary Audio Input
Enabler using:
ATmega8 is clocked at 8.00 MHz with the internal RC
ATmega8’s internal analog comparator handles the receive side
ATmega8’s two GPIOs as antagonist output pins perform the bus
driver
Documentation Credit
Jeremiah J. Flerchinger
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